SCAMP Technology

The SCAMP vision chip contains a massively parallel SIMD processor array, with one processing element per image pixel. The processors are simple, but fully software-programmable entities, comprising local memory, ALU, control and I/O circuits. Our unique mixed-mode datapath allows the execution of some operations in the analog domain, achieving low-power and bypassing the need for A/D conversion.

The results of computation can be read-out as grayscale images (mostly for debugging purposes) and binary images. If the results of computations are sparse (e.g. when points of interest are identified), an event-based readout  (coordinates of pixels or bounding boxes)  allows to minimise the bandwidth between the sensor chip and the rest of the system.

Our prototype device, SCAMP-5 integrated circuit, integrates 65,536 processor cores, in a 256x256 pixel array. At peak performance it can carry out over 500 GOPS (billion operations per second) at power consumption below 1.2W. We have demonstrated processing speeds up to 100,000 fps (frames per second), although typical high-speed operation in a robotic application may be at about 1000s fps or less. The power depends on the processing load, i.e. the algorithm and frame rate, and can be below 1 mW in low-power "always-on" visual monitoring applications.

The state-of-the-art performance and efficiency figures are all the more remarkable considering this academic prototype has been fabricated in a 20 years old silicon technology (180nm CMOS)!